论文标题
hadas：硬件感知动态神经体系结构寻找边缘性能缩放
HADAS: Hardware-Aware Dynamic Neural Architecture Search for Edge Performance Scaling
论文作者
论文摘要
动态神经网络（DYNNS）已成为可行的技术，可以在维持计算效率的同时对资源受限的边缘设备进行智能。在许多情况下，由于在设计阶段开发了独立于两者的设计阶段，DYNN的实现可能是亚最佳的：（i）动态计算功能，例如早期退出，以及（ii）基础硬件的资源效率特征，例如动态电压和频率缩放（DVFS）。在解决这个问题时，我们提出了Hadas，这是一种新颖的硬件感知动态神经体系结构搜索框架，它实现了Dynn体系结构，其主链，早期退出功能和DVFS设置已被共同优化，以最大程度地提高性能和资源效率。我们使用CIFAR-100数据集和一组各种边缘计算平台的实验使HADAS动态模型与常规动态动力学相比，达到了高达57％的能源效率提高，同时保持所需的精度得分水平。我们的代码可从https://github.com/halimabouzidi/hadas获得
Dynamic neural networks (DyNNs) have become viable techniques to enable intelligence on resource-constrained edge devices while maintaining computational efficiency. In many cases, the implementation of DyNNs can be sub-optimal due to its underlying backbone architecture being developed at the design stage independent of both: (i) the dynamic computing features, e.g. early exiting, and (ii) the resource efficiency features of the underlying hardware, e.g., dynamic voltage and frequency scaling (DVFS). Addressing this, we present HADAS, a novel Hardware-Aware Dynamic Neural Architecture Search framework that realizes DyNN architectures whose backbone, early exiting features, and DVFS settings have been jointly optimized to maximize performance and resource efficiency. Our experiments using the CIFAR-100 dataset and a diverse set of edge computing platforms have seen HADAS dynamic models achieve up to 57% energy efficiency gains compared to the conventional dynamic ones while maintaining the desired level of accuracy scores. Our code is available at https://github.com/HalimaBouzidi/HADAS
