论文标题
神经网络的自动修复
Automated Repair of Neural Networks
论文作者
论文摘要
在过去的十年中,神经网络(NNS)已被广泛用于许多应用程序,包括安全系统,例如自主系统。尽管采用了新兴的采用,但众所周知,NNS容易受到对抗攻击的影响。因此,提供确保此类系统正常工作非常重要。为了解决这些问题,我们介绍了一个修复不安全NNS W.R.T.的框架。安全规范,即利用可满足的模型理论(SMT)求解器。我们的方法仅通过修改其重量值的少数数量来搜索新的,安全的NN表示形式。此外,我们的技术试图在其决策边界上最大程度地提高与原始网络的相似性。我们进行了广泛的实验,以证明我们提出的框架能够产生安全NNS W.R.T.的能力。对抗性的鲁棒性特性,只有轻度的准确性损失(就相似性而言)。此外,我们将方法与幼稚的基线进行了比较,以证明其有效性。总而言之,我们提供了一种算法,以自动修复具有安全性的NN,并建议一些启发式方法以提高其计算性能。当前,通过遵循这种方法,我们能够产生由分段线性relu激活函数组成的小型(即具有多达数百个参数)正确的NN。然而,我们的框架是一般的,从某种意义上说,它可以合成NNS W.R.T.一阶逻辑规范的任何可决定的片段。
Over the last decade, Neural Networks (NNs) have been widely used in numerous applications including safety-critical ones such as autonomous systems. Despite their emerging adoption, it is well known that NNs are susceptible to Adversarial Attacks. Hence, it is highly important to provide guarantees that such systems work correctly. To remedy these issues we introduce a framework for repairing unsafe NNs w.r.t. safety specification, that is by utilizing satisfiability modulo theories (SMT) solvers. Our method is able to search for a new, safe NN representation, by modifying only a few of its weight values. In addition, our technique attempts to maximize the similarity to original network with regard to its decision boundaries. We perform extensive experiments which demonstrate the capability of our proposed framework to yield safe NNs w.r.t. the Adversarial Robustness property, with only a mild loss of accuracy (in terms of similarity). Moreover, we compare our method with a naive baseline to empirically prove its effectiveness. To conclude, we provide an algorithm to automatically repair NNs given safety properties, and suggest a few heuristics to improve its computational performance. Currently, by following this approach we are capable of producing small-sized (i.e., with up to few hundreds of parameters) correct NNs, composed of the piecewise linear ReLU activation function. Nevertheless, our framework is general in the sense that it can synthesize NNs w.r.t. any decidable fragment of first-order logic specification.