论文标题
RVCorep-32IM：实施MUL/DIV指令的有效体系结构
RVCoreP-32IM: An effective architecture to implement mul/div instructions for five stage RISC-V soft processors
论文作者
论文摘要
RISC-V是一种开放的指令集体系结构，正在引起软处理器开发人员的注意。仅实现将RISC-V的基本32位整数指令集（定义为RV32i）对于嵌入式系统可能令人满意。但是，RV32I中不存在乘法和分割指令，而不是定义为M扩展。一些研究项目提出了RV32I和RV32IM处理器。但是，没有迹象表明通过向RV32i添加M扩展可以提高性能。换句话说，当我们应该考虑将M扩展添加到软处理器中时，以及硬件资源需求将增加多少。 在本文中，我们提出了RVCorep软处理器（仅实现RV32I指令集）的扩展，以支持RISC-V M扩展指令。一种简单的叉子加入方法用于扩展执行能力，以支持M扩展指令以及可能的未来增强功能。然后，我们使用Dhrystone，Coremark和Embench程序执行基准测试。我们发现RV32IM的性能分别为1.87和3.13倍，分别为Radix-4和DSP乘数。除此之外，我们的RV32IM实施比等效的RISC-V处理器要高13 \％。
RISC-V, an open instruction set architecture, is getting the attention of soft processor developers. Implementing only a basic 32-bit integer instruction set of RISC-V, which is defined as RV32I, might be satisfactory for embedded systems. However, multiplication and division instructions are not present in RV32I, rather than defined as M-extension. Several research projects have proposed both RV32I and RV32IM processor. However, there is no indication of how much performance can be improved by adding M-extension to RV32I. In other words, when we should consider adding M-extension into the soft processor and how much hardware resource requirements will increase. In this paper, we propose an extension of the RVCoreP soft processor (which implements RV32I instruction set only) to support RISC-V M-extension instructions. A simple fork-join method is used to expand the execution capability to support M-extension instructions as well as a possible future enhancement. We then perform the benchmark using Dhrystone, Coremark, and Embench programs. We found that RV32IM is 1.87 and 3.13 times better in performance for radix-4 and DSP multiplier, respectively. In addition to that, our RV32IM implementation is 13\% better than the equivalent RISC-V processor.
